IBM required Verification Engineer - ISTL
Job Description:
- Verification expertise (chip level and/or block level) - From spec to tape-out for complex designs.
- Test Plant/test bench infrastructure/test cases/coverage ownership and execution for multiple projects.
- Hands on experience in System Verilog/Specman/Vera or C++
- Knowledge of CPU architecture (inclusive of but not limited to cores/io's/memories and related logic)
For More Detail Click on the Link Given Below